NASA’s space probes have been using a PowerPC-based computing architecture going back over two decades, so it’s about time for a refresh. So now SiFive <https://www.theregister.co.uk/2022/09/06/nasas_spaceflight_computer_risc_v/> is going to supply NASA with a new computing platform based on its X280 RISC-V CPU. “RISC” is supposed to stand for “Reduced Instruction Set Computing”. However, many current RISC architectures (including ARM and POWER/PowerPC) have seen a large blowout of their instruction-set size when they started adding SIMD vector operations. These instructions operate on fixed-length sets of around 4, 8 or 16 operands, performing the same operation on all operands simultaneously (hence “SIMD”, standing for “Single Instruction, Multiple Data”). Trouble is, you need a lot of different variants of each instruction for coping with different data types. While vector operations are important for many uses, RISC-V takes a different approach, harking back to the old supercomputers designed by the legendary Seymour Cray: instead of having to operate on all operands simultaneously, the instructions operate elementwise on variable-length arrays (the original Cray-1 design allowed for arrays of up to 64 elements at a time), with operands being processed sequentially through a multi-stage pipeline. This should help keep things simpler, while still making it fast.