On Tue, 6 Jul 2021 14:05:49 +1200, Michael Cree wrote:
On Tue, Jul 06, 2021 at 01:00:15PM +1200, Lawrence D'Oliveiro wrote:
Having used both kinds of computer architectures over the years, I agree. Little-endian ordering is more mathematically consistent.
What do you mean? They are both mathematically consistent. If one was not mathematically consistent it would not have even been used.
Big-endian was mainly used because it was easier to get data dumps to match reading order, which might have been helpful for debugging. Consider the numbers assigned to three different things in a multibyte object: the bytes within the object, the bits within the byte/object, and the weightings of the bits as digits in a binary integer (bit 0 represents 2**0, bit 1 represents 2**1 etc). Only in little-endian do you have a straightforward relationship among all three: in big-endian layouts, it is unavoidable that at least one of the three ends up the opposite way to the others. And different big-endian architectures make different decisions about the ordering, sometimes even within different generations of the same architecture. For example, in the original Motorola 68000 instruction set, the single-bit insertion/extraction instructions numbered the bits the same way as the digit weightings; but with the multibit field insertion/extraction instructions added in the 32-bit 68020 and later processors, the numbering was the opposite way! In the IBM POWER architecture, “bit 0” was the designation for the most significant bit of an integer, not the least significant bit.
Little-endian does have this advantage: If you place different length words at the same memory address, the low bytes of the shorter word lands at the same address as the low bytes of the longer word. This does not happen with big-endian.
Even in big-endian architectures, registers tend to behave as though they are little-endian. For example, consider whatever the instruction-set-specific equivalent of this sequence might be: move-32-bits A to B move-8-bits B to C where either B is a register and A and C are in main memory (so the first move is a load and the second one is a store), or the other way round. Does C end up with the most or least significant 8 bits of the 32-bit quantity from A?